Device scaling effects on hot-carrier induced interface and oxide-trapped charge distributions in MOSFETs

Mahapatra, S. ; Parikh, C. D. ; Rao, V. R. ; Viswanathan, C. R. ; Vasi, J. (2000) Device scaling effects on hot-carrier induced interface and oxide-trapped charge distributions in MOSFETs IEEE Transactions on Electron Devices, 47 (4). pp. 789-796. ISSN 0018-9383

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Related URL: http://dx.doi.org/10.1109/16.830995

Abstract

The influence of channel length and oxide thickness on the hot-carrier induced interface (Nit) and oxide (Not) trap profiles is studied in n-channel LDD MOSFET's using a novel charge pumping (CP) technique. The technique directly provides separate Nit and Not profiles without using simulation, iteration or neutralization, and has better immunity from measurement noise by avoiding numerical differentiation of data. The Nit and Not profiles obtained under a variety of stress conditions show well-defined trends with the variation in device dimensions. The Nit generation has been found to be the dominant damage mode for devices having thinner oxides and shorter channel lengths. Both the peak and spread of the Nit profiles have been found to affect the transconductance degradation, observed over different channel lengths and oxide thicknesses. Results are presented which provide useful insight into the effect of device scaling on the hot-carrier degradation process.

Item Type:Article
Source:Copyright of this article belongs to IEEE.
ID Code:41574
Deposited On:30 May 2011 09:30
Last Modified:17 May 2016 23:15

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