Localized charge injection: a tool to investigate plasma damage in CMOS devices

Abstract

In this paper we describe an electrical technique to characterize plasma induced gate edge damage in submicron MOS transistors. We show from experimental and simulation results that under a set of specific gate and drain bias conditions, localized charge injection takes place in the gate-drain overlap region. The resulting gate voltage in localized charge injection mode can be used as a monitor of gate edge thickness, which in turn can be used as an effective measure of plasma damage due to the poly etch process.