Thakker, R. A. ; Sathe, C. ; Sachid, A. B. ; Baghini, M. S. ; Rao, V. R. ; Patil, M. B. (2009) Automated design and optimization of circuits in emerging technologies Proceedings of the 14th Asiaand South Pacific Design Automation Conference" (ASP-DAC 2009), Yokohama, Japan . pp. 504-509.
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Official URL: http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumb...
Related URL: http://dx.doi.org/10.1109/ASPDAC.2009.4796530
Abstract
A novel table-based environment for automatic design and optimization of FinFET circuits is demonstrated. A new accurate look-up table (LUT) technique is implemented in a circuit simulator and integrated with particle swarm optimization algorithm for efficient circuit designs in novel devices. Op-amp circuits are designed and optimized to demonstrate the accuracy and usefulness of the proposed platform. Further, it is shown that the proposed design methodology can take into account variations in process, supply voltage, and temperature.
| Item Type: | Article |
|---|---|
| Source: | Copyright of this article belongs to Proceedings of the 14th Asiaand South Pacific Design Automation Conference" (ASP-DAC 2009), Yokohama, Japan. |
| ID Code: | 79743 |
| Deposited On: | 28 Jan 2012 11:54 |
| Last Modified: | 28 Jan 2012 11:54 |
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