Characterization of interface and oxide traps in Ge pMOSFETs based on DCIV technique

Maji, D. ; Crupi, F. ; Magnone, P. ; Giusi, G. ; Pace, C. ; Simoen, E. ; Rao, V. R. (2009) Characterization of interface and oxide traps in Ge pMOSFETs based on DCIV technique Proceedings of the IEEE International Workshop on Electron Devices & Semiconductor Technology, Mumbai, India . pp. 1-4.

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Official URL: http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumb...

Related URL: http://dx.doi.org/10.1109/EDST.2009.5166133

Abstract

The interface trap density of fresh TiN/TaN gated HfO2/SiO2/Si/epi-Ge pMOSFETs is measured using the DCIV technique. Its temperature dependence is also discussed here. We observe a polarity dependent DCIV peak shift. The bias temperature stress induced interface trapped charge and oxide trapped charge shifts are also systematically investigated in this work.

Item Type:Article
Source:Copyright of this article belongs to Proceedings of the IEEE International Workshop on Electron Devices & Semiconductor Technology, Mumbai, India.
ID Code:79741
Deposited On:28 Jan 2012 11:56
Last Modified:28 Jan 2012 11:56

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