Shrivastava, M. ; Gossner, H. ; Baghini, M. S. ; Rao, V. R. (2010) 3D TCAD base d approach for the evaluation of nanoscale devices during ESD failure 7th International SoC Design Conference (ISOCC 2010) . pp. 268-271.
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Official URL: http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumb...
Related URL: http://dx.doi.org/10.1109/SOCDC.2010.5682919
Abstract
This paper demonstrates a 3D TCAD based approach towards the evaluation and pre-silicon development of nanoscale devices for advanced ESD protection concepts. Impact of various physical models and parameters on the accuracy of predicted ESD figures of merit are discussed. Moreover, various devices options, have been evaluated from 3D TCAD simulations.
| Item Type: | Article |
|---|---|
| Source: | Copyright of this article belongs to 7th International SoC Design Conference (ISOCC 2010). |
| ID Code: | 79730 |
| Deposited On: | 28 Jan 2012 11:58 |
| Last Modified: | 28 Jan 2012 11:58 |
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