Murali, K. ; Sinha, Sudeshna (2007) Using synchronization to obtain dynamic logic gates Physical Review E - Statistical, Nonlinear and Soft Matter Physics, 75 (2). 025201_1-025201_4. ISSN 1539-3755
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Official URL: http://pre.aps.org/abstract/PRE/v75/i2/e025201
Related URL: http://dx.doi.org/10.1103/PhysRevE.75.025201
Abstract
We introduce a scheme to obtain key logic-gate structures, using synchronization of nonlinear systems. We demonstrate the idea explicitly by numerics and experiments on nonlinear circuits. A significant feature of this scheme is that a single nonlinear drive-response circuit can be used to flexibly yield the different logic gates, and switch logic behavior by small changes in the parameter of the response system; so the response system can act as a "logic output controller". Thus this scheme may help to construct dynamic general-purpose computational hardware with reconfigurable abilities.
Item Type: | Article |
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Source: | Copyright of this article belongs to The American Physical Society. |
ID Code: | 60927 |
Deposited On: | 12 Sep 2011 09:40 |
Last Modified: | 18 May 2016 10:51 |
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