Murali, K. ; Sinha, Sudeshna ; Ditto, William L. (2003) Implementation of NOR gate by a chaotic Chua's circuit International Journal of Bifurcation and Chaos in Applied Sciences and Engineeringy and Applications, 13 (9). pp. 2669-2672. ISSN 0218-1274
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Official URL: http://www.worldscinet.com/ijbc/13/1309/S021812740...
Related URL: http://dx.doi.org/10.1142/S0218127403008053
Abstract
We report the experimental implementation of the most fundamental NOR gate with a chaotic Chua's circuit by a simple threshold mechanism. This provides a proof-of-principle experiment to demonstrate the universal computing capability of chaotic circuits in continuous time systems.
| Item Type: | Article |
|---|---|
| Source: | Copyright of this article belongs to World Scientific Publishing Company. |
| Keywords: | Chaos; Computing; Circuit |
| ID Code: | 60917 |
| Deposited On: | 12 Sep 2011 09:38 |
| Last Modified: | 12 Sep 2011 09:38 |
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