Munakata, T. ; Sinha, S. ; Ditto, W. L. (2002) Chaos computing: implementation of fundamental logical gates by chaotic elements IEEE Transactions on Circuits and Systems Part I: Fundamental Theory and Applications, 49 (11). pp. 1629-1633. ISSN 1057-7122
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Official URL: http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arn...
Related URL: http://dx.doi.org/10.1109/TCSI.2002.804551
Abstract
Basic principles of implementing the most fundamental computing functions by chaotic elements are described. They provide a theoretical foundation of computer architecture based on a totally new principle other than silicon chips. The fundamental functions are: the logical AND, OR, NOT, XOR, and NAND operations (gates) and bit-by-bit arithmetic operations. Each of the logical operations is realized by employing a single chaotic element. Computer memory can be constructed by combining logical gates. With these fundamental ingredients in hand, it is conceivable to build a simple, fast, yet cost effective, general-purpose computing device. Chaos computing may also lead to dynamic architecture, where the hardware design itself evolves during the course of computation.. The basic ideas are explained by employing a one-dimensional model, specifically the logistic map.
Item Type: | Article |
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Source: | Copyright of this article belongs to IEEE. |
ID Code: | 60910 |
Deposited On: | 12 Sep 2011 09:38 |
Last Modified: | 12 Sep 2011 09:38 |
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