Optimal design of nonlinear dc transistor circuits without solving network equations

Abstract

A method is described for the optimization of nonlinear dc circuits. A performance index is defined to measure the difference. between the desired and the actual specifications. The novel approach taken here is to treat the network equations as equality constraints on the design parameters. The constrained optimization problem is then converted to an unconstrained one by a penalty function technique. A straightforward method is given for computing all the gradients needed during the optimization, given only the topology of the network and the branch relationships. This makes the algorithm easily amenable to a package program.