Hysteresis behavior in 85-nm channel length vertical n-MOSFETs grown by MBE

Rao, V. R. ; Wittmann, F. ; Gossner, H. ; Eisele, I. (1996) Hysteresis behavior in 85-nm channel length vertical n-MOSFETs grown by MBE IEEE Transactions on Electron Devices, 43 (6). pp. 973-976. ISSN 0018-9383

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Official URL: http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arn...

Related URL: http://dx.doi.org/10.1109/16.502132

Abstract

Vertical n-MOSFETs with channel lengths of 85 nm have been grown by MBE. For drain-to-source voltages VDS>3.3 V, these transistors exhibit hysteresis behavior similar to the reported behavior of fully depleted SOI-MOSFETs. Our results also show a gate voltage controlled turn-off of the drain current when the transistor is operating in the hysteresis mode. We have analyzed this behavior in vertical n-MOSFETs using 2-D device simulation and our results show a threshold value for the hole concentration across the source-channel junction which is required for the forward biasing of this junction. For a transistor operating in the hysteresis mode, we show that the potential barrier height for electron injection across the source-channel junction increases for increasing negative gate voltages during retrace. This results in a gate controlled turn-off of the drain current for SOI and vertical n-MOSFETs operating in the regenerative mode.

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