Modelling, analysis, and acceleration of a printed circuit board fabrication process

Abstract

Product design and fabrication constitute an important business activity in any manufacturing firm. Designing an optimized product fabrication process is an important problem in itself and is of significant practical and research interest. In this paper, we look into a printed circuit board (PCB) fabrication process and investigate ways in which the fabrication cycle time can be minimized. Single class queueing networks constitute the modelling framework for our study. The model developed in this paper and the analysis experiments carried out are based on extensive data collected on a PCB fabrication company located in Bangalore, India. This is a representative PCB fabrication company involving multiple, concurrent fabrication works with contention for human/technical resources. Our model seeks to capture faithfully the flow of the fabrication process in this company and such other organisations, using queueing networks. Using the model developed, we explore how the cycle times can be reduced using input control, load balancing, and variability reduction. The model presented is sufficiently generic and conceptual; its scope extends beyond that of a PCB fabrication organization.