Dhananjay, ; Krupanidhi, S. B. (2007) Low threshold voltage ZnO thin film transistor with a Zn0.7Mg0.3O gate dielectric for transparent electronics Journal of Applied Physics, 101 (12). 123717_1-123717_6. ISSN 0021-8979
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Official URL: http://jap.aip.org/resource/1/japiau/v101/i12/p123...
Related URL: http://dx.doi.org/10.1063/1.2748863
Abstract
A highly transparent all ZnO thin film transistor (ZnO-TFT) with a transmittance of above 80% in the visible part of the spectrum, was fabricated by direct current magnetron sputtering, with a bottom gate configuration. The ZnO-TFT with undoped ZnO channel layers deposited on 300 nm Zn0.7Mg0.3O gate dielectric layers attains an on/off ratio of 104 and mobility of 20 cm2/Vs. The capacitance-voltage (C-V) characteristics of the ZnO-TFT exhibited a transition from depletion to accumulation with a small hysteresis indicating the presence of oxide traps. The trap density was also computed from the Levinson's plot. The use of Zn0.7Mg0.3O as a dielectric layer adds additional dimension to its applications. The room temperature processing of the device depicts the possibility of the use of flexible substrates such as polymer substrates. The results provide the realization of transparent electronics for next-generation optoelectronics.
Item Type: | Article |
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Source: | Copyright of this article belongs to American Institute of Physics. |
ID Code: | 19325 |
Deposited On: | 23 Nov 2010 13:08 |
Last Modified: | 06 Jun 2011 04:14 |
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