Kanika, Kanika ; Shankar, R. ; Eswaramoorthi, R. ; Jeya Sheela, J. Joselin ; Suri, Ashish ; Vellachi, N. (2023) High-Performance Digital Signal Processing Circuit Design and Analysis for Wireless Communication Systems In: 2023 4th International Conference on Smart Electronics and Communication (ICOSEC), 20-22 September 2023, Trichy, India.
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Official URL: https://doi.org/10.1109/ICOSEC58147.2023.10276043
Related URL: http://dx.doi.org/10.1109/ICOSEC58147.2023.10276043
Abstract
DSP circuits are used to perform various signal processing tasks, such as filtering, modulation, demodulation, and encoding. The demand for high-performance DSP circuits is increasing as wireless communication systems continue to evolve into a faster and more efficient signal processing. One of the challenges in designing high-performance DSP circuits is to balance the trade-offs between power consumption, performance, and area utilization. Here, this study proposes a novel algorithmic approach, which is a combination of Support Vector Machine (SVM) and Convolutional Neural Network (CNN). Novel algorithms can be used to improve the efficiency and speed of DSP circuits. These algorithms can be implemented by using various hardware architectures, such as Digital Signal Processors (DSPs), Application-Specific Integrated Circuits (ASICs), and Field Programmable Gate Arrays (FPGAs). Hardware implementation involves designing and optimizing the circuitry to implement the selected architecture. This involves optimizing the layout, routing, and placement of the components to minimize the area and power consumption. Performance evaluation involves testing and measuring a circuit's performance to ensure that it meets the design specifications. In conclusion, high-performance DSP circuit design and analysis for wireless communication systems using novel algorithms is essential for meeting the ever-increasing demand for faster and more efficient signal processing. The design process involves several stages, including algorithm design, architectural selection, hardware implementation, and performance evaluation, and requires a deep understanding of both DSP theory and hardware design.
Item Type: | Conference or Workshop Item (Paper) |
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Source: | Copyright of this article belongs to 2023 4th International Conference on Smart Electronics and Communication (ICOSEC). |
Keywords: | Wireless communication; Support vector machines; Machine learning algorithms; Power demand; Signal processing algorithms; Digital signal processing; Hardware. |
ID Code: | 139508 |
Deposited On: | 24 Aug 2025 07:39 |
Last Modified: | 24 Aug 2025 07:39 |
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