Digital controller implementation for non-inverting buck-boost converter using run-time partial reconfiguration of FPGA

Sajeesh, Kumar K ; Agarwal, Vivek (2012) Digital controller implementation for non-inverting buck-boost converter using run-time partial reconfiguration of FPGA In: 2012 IEEE 5th India International Conference on Power Electronics (IICPE), 6-8 Dec. 2012, Delhi, India.

Full text not available from this repository.

Official URL: http://doi.org/10.1109/IICPE.2012.6450422

Related URL: http://dx.doi.org/10.1109/IICPE.2012.6450422

Abstract

A novel idea of implementation of digital controller for non-inverting buck-boost converter using run-time self reconfiguration of Field Programmable Gate Array (FPGA) is presented in this paper. FPGA reconfigures itself in real time to change the control strategy as per the input voltage variations to operate the converter either in buck mode or in boost mode or as a combination of buck and boost modes. As the buck and boost controller modules are configured inside the FPGA only when it is needed, this reduces the logic resource usage in each mode and thus the power consumption. Comparison is made between various implementation styles. Implementation details and experimental results are presented in this paper.

Item Type:Conference or Workshop Item (Paper)
Source:Copyright of this article belongs to Institute of Electrical and Electronics Engineers.
Keywords:Field Programmable Gate Array; Reconfigurable Logic; Pulse Width Modulation Converters; DC-DC Power Converter.
ID Code:115433
Deposited On:24 Mar 2021 10:48
Last Modified:24 Mar 2021 10:48

Repository Staff Only: item control page