Hybrid Phase Locked Loop for Controlling Master-Slave Configured Centralized Inverters in Large Solar Photovoltaic Power Plants

Abstract

This paper presents a hybrid phased locked loop (HPLL) algorithm for high power master-slave configured (MSC) centralized inverters for large photovoltaic power plants. Proposed PLL technique is a combination of double second order general integral (DSOGI) PLL and enhanced PLL (EPLL) with a zero crossing detector, which enables faster synchronization of slave inverters and enables early export of power into the grid. 3-φ PLL structures such as synchronous reference frame (SRF), double decoupled SRF (DDSRF), EPLL, DSOGI, and DSOGI with frequency locked loop (FLL) are discussed, and a comparative analysis with the proposed PLL technique is presented. The proposed PLL technique is superior as compared with existing PLL techniques in master-slave configurations where it can provide faster synchronization, dynamic interleaving of the hardware timers generating carrier waves for master-slave converters, and low voltage ride through (LVRT) capability. The proposed PLL technique along with the existing techniques is simulated and compared in MATLAB/SIMULINK and digitally implemented in TMS320F2812 based discrete signal controller. The performance of the proposed HPLL technique is experimentally validated with unbalanced and distorted grid signals. Experimental results of proposed HPLL show faster grid synchronization in MSC-based grid-connected inverter, LVRT capability, and dynamic interleaving of MSC inverters.