Hota, Arpan ; Jain, Sachin ; Agarwal, Vivek (2018) An Improved Three-Phase Five-Level Inverter Topology With Reduced Number of Switching Power Devices IEEE Transactions on Industrial Electronics, 65 (4). pp. 3296-3305. ISSN 0278-0046
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Official URL: http://doi.org/10.1109/TIE.2017.2758722
Related URL: http://dx.doi.org/10.1109/TIE.2017.2758722
Abstract
This paper presents an optimized topology of 3-φ, multilevel inverter (MLI) configuration for five or higher level operation with reduced switch count. The proposed solution consists of two basic units (BUs) of multilevel converter and a T-structured 3-level inverter (3-LI). Both BUs are equally shared by the three phases maintaining symmetry among the phases. Moreover, for a higher level operation of the proposed MLI, the modifications required are at two BUs only and not at three legs of the inverter. It further helps in reducing the requirement of extra components for higher level operation compared to the conventional solutions. Furthermore, the topology also has the benefits of reduced switching and conduction loss. An algorithm is also devised to generate the switching pulses for the BUs and the 3-LI, using a carrier-based space vector modulation technique. Presented topology is compared with other existing topologies to prove its advantage. All the details regarding the operating modes and pulse width modulation techniques employed for the proposed system are given and supported by the simulation and experimental results.
Item Type: | Article |
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Source: | Copyright of this article belongs to Institute of Electrical and Electronics Engineers. |
Keywords: | Basic Unit (BU); Carrier-Based Space Vector Modulation(CSVM); Multilevel Inverter(MLI); Three-Phase. |
ID Code: | 114972 |
Deposited On: | 16 Mar 2021 07:28 |
Last Modified: | 16 Mar 2021 07:28 |
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