Latremouille, Damien ; Harper, Kyle ; Subrahmanyan, Ravi (2007) An architecture for embedded IEEE 1588 support In: IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication, 2007. ISPCS 2007, 1-3 Oct. 2007, Vienna, Austria.
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Official URL: https://ieeexplore.ieee.org/document/4383786/
Related URL: http://dx.doi.org/10.1109/ISPCS.2007.4383786
Abstract
This paper describes a first-generation architecture for IEEE 1588 support in an embedded processor. Close coupling is provided between the internal IEEE 1588 timebase and the packet interface in order to minimize the impact of software delays on the calculated time. A versatile timer interface is also directly coupled via hardware to the internal timebase. This allows direct programming of output events, including complex waveforms, from the internal timebase without software intervention.
| Item Type: | Conference or Workshop Item (Paper) |
|---|---|
| Source: | Copyright of this article belongs to Institute of Electrical and Electronics Engineers. |
| ID Code: | 114377 |
| Deposited On: | 22 May 2018 10:51 |
| Last Modified: | 22 May 2018 10:51 |
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