Conductive polymer bump interconnects

Abstract

Conductive polymer bonded flip chip interconnect systems can provide an attractive alternative flip chip technology in terms of cost and manufacturability. This work examines the feasibility of application of such a technology. A mathematical model for stencil printing of conductive adhesive paste is developed to demonstrate some of the factors affecting the print quality. Designed experiments is used to optimize bump dimensional uniformity. The electrical performance of conductive polymer flip chip interconnects is evaluated through both GaAs and Si devices. The microwave insertion loss (S/sub 21/) of a coplanar waveguide test vehicle showed a loss rate of 0.031 dB/GHz for non-underfilled flip chip assembly and 0.065 dB/GHz for those with underfill encapsulation. These S/sub 21/ data are almost identical to a device with same test structure and a Au ball bumped flip chip assembly. Additional test using a CT-2 antenna switch GaAs device flip chip bonded on a FR4 board showed an identical performance (up to 2 GHz frequency) to the same assembly using Au-Sn eutectic bumps. Reliability of conductive polymer bumps was evaluated using Si die flip chip bonded on FR4 substrates. Results showed no failures on temperature cycle, humidity, vibration, and mechanical shock tests. There were 8.6% failures on HAST and 6% failures on thermal shock tests on test conditions stated in the text.