Nair, P. R. ; Kumar, B. ; Sharma, R. ; Mahapatra, S. ; Kamohara, S. (2004) A comprehensive trapped charge profiling technique for SONOS flash EEPROMs In: 2004 IEEE International Electron Devices Meeting, IEDM Technical Digest, 13-15 Dec, 2004, San Francisco, CA, USA.
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Official URL: http://ieeexplore.ieee.org/document/1419170/
Related URL: http://dx.doi.org/10.1109/IEDM.2004.1419170
Abstract
Trapped charge profiles under CHE program of SONOS flash cells are uniquely determined and verified using I-V, GIDL and CP measurements and Monte Carlo simulations. The prospect of profiling using I-V measurement alone is discussed. The inaccuracy associated with conventional CP technique is discussed. The correct method of CP simulation for programmed SONOS devices is shown and programming induced interface-trap generation is estimated.
| Item Type: | Conference or Workshop Item (Paper) |
|---|---|
| Source: | Copyright of this article belongs to Institute of Electrical and Electronics Engineers. |
| ID Code: | 112661 |
| Deposited On: | 12 Apr 2018 07:22 |
| Last Modified: | 12 Apr 2018 07:22 |
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