Joshi, Kaustubh ; Mukhopadhyay, Subhadeep ; Goel, Nilesh ; Mahapatra, Souvik (2012) A consistent physical framework for N and P BTI in HKMG MOSFETs In: 2012 IEEE International Conference on Reliability Physics Symposium (IRPS).
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Official URL: http://ieeexplore.ieee.org/document/6241840/
Related URL: http://dx.doi.org/10.1109/IRPS.2012.6241840
Abstract
A common framework of trap generation and trapping is used to explain Negative Bias Temperature Instability (NBTI) and Positive Bias Temperature Instability (PBTI) DC and AC stress/recovery data. NBTI is explained using trap generation in Si/SiON (IL) interface and SiON (IL) bulk, together with hole trapping in pre-existing bulk SiON (IL) traps. Interface trap generation and recovery can be fully explained using Reaction-Diffusion (RD) model. PBTI is explained using trap generation in SiON (IL)/HK interface and HK bulk, together with electron trapping in pre-existing bulk HK traps. Important similarities as well as differences between N and P BTI are highlighted.
| Item Type: | Conference or Workshop Item (Paper) |
|---|---|
| Source: | Copyright of this article belongs to Institute of Electrical and Electronics Engineers. |
| Keywords: | AC Stress; NBTI; PBTI; Trap Generation; Trapping; NBTI Modeling; RD Model; PBTI Modeling; DC Stress |
| ID Code: | 112588 |
| Deposited On: | 11 Apr 2018 11:47 |
| Last Modified: | 11 Apr 2018 11:47 |
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