Ultrafast measurements and physical modeling of NBTI stress and recovery in RMG FinFETs under diverse DC–AC experimental conditions

Abstract

Threshold voltage shift (ΔV_T) due to negative-bias temperature instability (NBTI) in p-FinFETs with replacement metal gate-based high-k metal gate process is measured using an ultrafast method. A comprehensive modeling framework involving uncorrelated contributions from the generation of interface traps (ΔV_IT), hole trapping in preexisting (ΔV_HT) and generation of new (ΔV_OT) bulk insulator traps is used to quantify measured data. The model can explain dc stress and recovery data over an extended temperature range (−40°C to 150°C), for different stress and recovery biases. It can explain AC stress and recovery data for different bias, temperature, frequency and duty cycle. The differences in time kinetics and temperature activation of ΔV_IT, ΔV_HT and ΔVO_T and their relative dominance at various experimental conditions are shown. End-of-life NBTI for DC and AC stress is estimated by using the model and compared to prediction from conventional analytical methods.