Singh, Yashi ; Hussain, Ikhlaq ; Singh, Bhim ; Mishra, Sukumar (2016) Real time implementation of EPLL with generalized filtering in single phase grid interfaced SPV system In: IEEE Uttar Pradesh Section International Conference on Electrical, Computer and Electronics Engineering (UPCON), 2016, 9-11 Dec. 2016, Varanasi, India.
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Official URL: http://ieeexplore.ieee.org/document/7894623/
Related URL: http://dx.doi.org/10.1109/UPCON.2016.7894623
Abstract
This paper deals with an enhanced phase locked loop with generalized filtering (GF-EPLL) based control algorithm for a grid interfaced solar photovoltaic (SPV) system. The interface between the SPV array and the grid is realized by a voltage source inverter (VSI). The VSI is implemented for SPV power extraction at high power quality and to feed it into the grid and load connected to it. The IC (Incremental Conductance) based MPPT (Maximum Power Point Tracking) algorithm provides the peak power extraction from a SPV array at various environmental conditions. The GF-EPLL based control algorithm is implemented for harmonics elimination and load compensation for power quality enhancement. The phase compensation is introduced in the GF-EPLL algorithm to enhance the transient response of the system. To demonstrate the performance of proposed single stage SPV system, extensive tests are carried out on a prototype of it in the laboratory.
| Item Type: | Conference or Workshop Item (Paper) |
|---|---|
| Source: | Copyright of this article belongs to Institute of Electrical and Electronics Engineers. |
| Keywords: | SPV; VSI; GF-EPLL; MPPT and Power Quality |
| ID Code: | 110707 |
| Deposited On: | 04 Aug 2017 13:12 |
| Last Modified: | 04 Aug 2017 13:12 |
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