Dasgupta, P. ; Chakrabarti, P. P. ; Nandi, A. ; Krishna, S. ; Chakrabarti, A. (2001) Abstraction of word-level linear arithmetic functions from bit-level component descriptions In: Design, Automation and Test in Europe. Conference and Exhibition 2001, 13-16 March 2001, Munich, Germany.
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Official URL: http://ieeexplore.ieee.org/document/914992/
Related URL: http://dx.doi.org/10.1109/DATE.2001.914992
Abstract
RTL descriptions for word-level arithmetic components typically specify the architecture at the bit-level of the registers. The problem studied in this paper is to abstract the word-level functionality of a component from its bit-level specification. This is particularly useful in simulation since word-level descriptions can be simulated much faster than bit-level descriptions. Word-level abstractions are also useful for reducing the complexity of component matching since the number of words is significantly smaller than the number of bits. This paper presents an algorithm for abstraction of word-level linear functions from bit-level component descriptions. We also present complexity results for component matching which justifies the advantage of performing abstraction prior to component matching.
| Item Type: | Conference or Workshop Item (Paper) |
|---|---|
| Source: | Copyright of this article belongs to Institute of Electrical and Electronics Engineers. |
| ID Code: | 101725 |
| Deposited On: | 09 Mar 2018 10:18 |
| Last Modified: | 09 Mar 2018 10:18 |
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