Banerjee, A. ; Pal, B. ; Kamarapu, C. ; Dasgupta, P. ; Chakrabarti, P. P. ; Jha, M. (2004) Assertion based verification: have I written enough properties? In: IEEE INDICON 2004. First India Annual Conference, 2004, 20-22 December 2004.
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Official URL: http://ieeexplore.ieee.org/document/1497773/
Related URL: http://dx.doi.org/10.1109/INDICO.2004.1497773
Abstract
In recent times, assertion-based verification (ABV) has become an essential component of the pre-silicon design validation flow. However, the use of ABV to validate descriptions of systems during simulation lacks a proper coverage metric. We consider the task of determining the coverage of a set of assertions against a high-level stuck-at fault model. Such a coverage analysis can aid the verification engineer to add more assertions to enhance his property suite.
Item Type: | Conference or Workshop Item (Paper) |
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Source: | Copyright of this article belongs to Institute of Electrical and Electronics Engineers. |
ID Code: | 101717 |
Deposited On: | 09 Mar 2018 10:18 |
Last Modified: | 09 Mar 2018 10:18 |
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