Pal, Bhaskar ; Banerjee, Ansuman ; Dasgupta, Pallab ; Chakrabarti, P. P. (2004) The BUSpec platform for automated generation of verification aids for standard bus protocols In: Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2004. MEMOCODE '04, 23-25 June 2004, San Diego, CA, USA.
Full text not available from this repository.
Official URL: http://ieeexplore.ieee.org/document/1459831/
Related URL: http://dx.doi.org/10.1109/MEMCOD.2004.1459831
Abstract
A typical verification IP (VIP) of a bus protocol such as ARM AMBA or PCI consists of a set of assertions and associated verification aids like test-benches and coverage metrics. While, several languages have been formalized for specifying assertions (examples include OVA, Sugar, ForSpec, SVA, etc), the tasks of writing test-benches that produce protocol compliant stimuli and coverage monitors that reflect the coverage of the protocol functionality are also of significant importance. This paper presents a platform for high-level specification of a bus protocol and an automated methodology for generating a variety of verification aids that must supplement the set of assertions in a VIP.
| Item Type: | Conference or Workshop Item (Paper) |
|---|---|
| Source: | Copyright of this article belongs to Institute of Electrical and Electronics Engineers. |
| ID Code: | 101716 |
| Deposited On: | 09 Mar 2018 10:18 |
| Last Modified: | 09 Mar 2018 10:18 |
Repository Staff Only: item control page
