Das, Sourasis ; Banerjee, Ansuman ; Dasgupta, Pallab (2012) A generalized theory for formal assertion coverage In: 2012 IEEE 21st Asian Test Symposium, Niigata, Japan, 19-22 November 2012.
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Official URL: http://ieeexplore.ieee.org/document/6394189/
Related URL: http://dx.doi.org/10.1109/ATS.2012.20
Abstract
Coverage of formal property specifications has important ramifications in design verification. Mutation coverage, a well studied approach towards specification coverage, checks whether the specification fails in the presence of a fault. Existing mutation coverage methods are broadly divided into those which inject the fault into a given implementation and those which inject the fault directly into the specification. This paper presents a theory which unifies these contrasting approaches and extends the mutation coverage approach to partial implementations where some components are given, and for the others, we only have component specifications.
| Item Type: | Conference or Workshop Item (Paper) |
|---|---|
| Source: | Copyright of this article belongs to Institute of Electrical and Electronics Engineers. |
| Keywords: | Topology; Cost Accounting; Standards; Protocols; Performance Evaluation; Microelectronics; Computer Bugs |
| ID Code: | 101627 |
| Deposited On: | 12 Dec 2016 10:41 |
| Last Modified: | 12 Dec 2016 10:41 |
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