On the design of the triple-resonance interstage network

Dutta Roy, S. C. (2008) On the design of the triple-resonance interstage network IEEE Transactions on Circuits and Systems II: Express Briefs, 55 (9). pp. 863-866. ISSN 1549-7747

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Official URL: http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumb...

Related URL: http://dx.doi.org/10.1109/TCSII.2008.923416

Abstract

The triple resonance network has emerged as a promising candidate for interstage bandwidth enhancement in cascaded CMOS amplifiers. This paper presents several design procedures for such networks, subject to the condition of moderate (1 dB) or no peaking in the passband, for the case where the devices can be chosen or designed, as well as the case in which the devices are given.

Item Type:Article
Source:Copyright of this article belongs to Institute of Electrical and Electronic Engineers.
ID Code:9990
Deposited On:02 Nov 2010 10:11
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