Banerjee, S. ; Parui, S. (2003) Delays in PWM control loops imply discontinuity in sampled data models of power electronic circuits Proceedings - IEEE International Symposium on Circuits and Systems, 3 . pp. 92-95.
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Official URL: http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arn...
Related URL: http://dx.doi.org/10.1109/ISCAS.2003.1204963
Abstract
Past investigation on nonlinear phenomena in DC-DC converters assume ideal and instantaneous action of switches, for which the sampled data models yield piecewise smooth but continuous maps. In this paper we show that the unavoidable delay in the switching logic results in discontinuity in the map, which drastically changes the bifurcation structures.
| Item Type: | Article |
|---|---|
| Source: | Copyright of this article belongs to IEEE. |
| ID Code: | 81388 |
| Deposited On: | 06 Feb 2012 04:11 |
| Last Modified: | 06 Feb 2012 04:11 |
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