Optimization of sub 100 nm Γ-gate Si-MOSFETs for RF applications

Gupta, Mayank ; Vidya, V. ; Ramagpopal Rao, V. ; To, Kun H. ; Woo, Jason C. S. (2002) Optimization of sub 100 nm Γ-gate Si-MOSFETs for RF applications Proceedings of the 11th International Workshop on The Physics of Semiconductor Devices, Delhi, India, 4746 (2). pp. 652-656. ISSN 1017-2653

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Abstract

This paper presents characterization and simulation studies on the RF performance of the Γ (Gamma) gate MOSFETs. The Γ-gate MOSFET offers the advantage of reduced gate resistance, a critical parameter in high frequency circuits. The aim of this study is to identify the optimum Γ-gate extension length from the gate and drain resistance point of view in aggressively scaled CMOS.

Item Type:Article
Source:Copyright of this article belongs to Proceedings of the 11th International Workshop on the Physics of Semiconductor Devices, Delhi, India.
ID Code:79790
Deposited On:28 Jan 2012 11:46
Last Modified:18 May 2016 22:01

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