Fault tolerance and detection in chaotic computers

Jahed-motlagh, Mohammad R. ; Kia, Behnam ; Ditto, William L. ; Sinha, Sudeshna (2007) Fault tolerance and detection in chaotic computers International Journal of Bifurcation and Chaos in Applied Sciences and Engineeringy and Applications, 17 (6). pp. 1955-1968. ISSN 0218-1274

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Official URL: http://www.worldscinet.com/ijbc/17/1706/S021812740...

Related URL: http://dx.doi.org/10.1142/S0218127407018142


We introduce a structural testing method for a dynamics based computing device. Our scheme detects different physical defects, manifesting themselves as parameter variations in the chaotic system at the core of the logic blocks. Since this testing method exploits the dynamical properties of chaotic systems to detect damaged logic blocks, the damaged elements can be detected by very few testing inputs, leading to very low testing time. Further the method does not entail dedicated or extra hardware for testing. Specifically, we demonstrate the method on one-dimensional unimodal chaotic maps. Some ideas for testing higher dimensional maps and flows are also presented.

Item Type:Article
Source:Copyright of this article belongs to World Scientific Publishing Company.
Keywords:Dynamics Based Computing; One-dimensional Chaotic Maps; Testing Systems; Testing Vectors
ID Code:60930
Deposited On:12 Sep 2011 09:40
Last Modified:12 Sep 2011 09:40

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