Dictionary based code compression for variable length instruction encodings

Das, Dipankar ; Kumar, Rajeev ; Chakrabarti, P. P. (2005) Dictionary based code compression for variable length instruction encodings Proceedings-IEEE International Conference on VLSI Design . pp. 545-550. ISSN 1063-9667

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Official URL: http://www.computer.org/portal/web/csdl/doi/10.110...

Related URL: http://dx.doi.org/10.1109/ICVD.2005.81


Most of the work done in the field of machine code compression is for fixed length instruction encodings. In this work we apply code compression on variable length instruction set processors whose encodings are already optimized to a certain extent with respect to their usages. We develop a dictionary based algorithm which utilizes unused encoding space of an instruction set architecture to encode code-words, and addresses issues arising out of variable length instructions. We test the algorithm with a RISC processor and include results for compression and performance in terms of cycle-counts and memory accesses respectively. We also present an efficient scheme for searching relocated branch addresses and analyze its performance.

Item Type:Article
Source:Copyright of this article belongs to Institute of Electrical and Electronic Engineers.
ID Code:5939
Deposited On:19 Oct 2010 10:07
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