Worst-case design of dc transistor circuits

Dutta, M. ; Vidyasagar, M. (1977) Worst-case design of dc transistor circuits IEEE Transactions on Circuits and Systems, 24 (5). pp. 273-274. ISSN 0098-4094

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Official URL: http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arn...

Related URL: http://dx.doi.org/10.1109/TCS.1977.1084330


The worst-case design of nonlinear dc transistor circuits is treated as a constrained minimax problem. The nonlinear network equations are treated as equality constraints on the design parameters. A recently proposed algorithm for constrained minimax optimization is then applied to solve the problem. A numerical example is taken to show that for worst-case design it is more natural to optimize a minimax performance function than a least-squares one.

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