Hariharan, V. ; Vasi, J. ; Rao, V. R. (2008) Drain current model including velocity saturation for symmetric double-gate MOSFETs IEEE Transactions on Electron Devices, 55 (8). pp. 2173-2180. ISSN 0018-9383
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Official URL: http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumb...
Related URL: http://dx.doi.org/10.1109/TED.2008.926745
Abstract
A drain current model is developed for a symmetrically driven undoped (or lightly doped) symmetric double-gate MOSFET (SDGFET) under the drift-diffusion transport mechanism, with velocity saturation effects being included as an integral part of the model derivation. Velocity saturation effects are modeled by using the Caughey-Thomas engineering model with exponent n=2. Id-Vd, Id-Vg, gm -Vg, and gDS-Vd comparisons are made with 2-D device simulation results, and a very good match is found all the way from subthreshold to strong inversion. Gummel symmetry compliance is also shown.
| Item Type: | Article |
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| Source: | Copyright of this article belongs to IEEE. |
| ID Code: | 41542 |
| Deposited On: | 30 May 2011 08:24 |
| Last Modified: | 17 May 2016 23:13 |
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