A FIFO-based multicast network and its use in multicomputers

Moona, Rajat ; Rajaraman, V. (1991) A FIFO-based multicast network and its use in multicomputers Microprocessors and Microsystems, 15 (10). pp. 543-547. ISSN 0141-9331

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Official URL: http://linkinghub.elsevier.com/retrieve/pii/014193...

Related URL: http://dx.doi.org/10.1016/0141-9331(91)90013-6


We present an implementation of a multicast network of processors. The processors are connected in a fully connected network and it is possible to broadcast data in a single instruction. The network works at the processor-memory speed and therefore provides a fast communication link among processors. A number of interesting architectures are possible using such a network. We show some of these architectures which have been implemented and are functional. We also show the system software calls which allow programming of these machines in parallel mode.

Item Type:Article
Source:Copyright of this article belongs to Elsevier Science.
Keywords:Networks; Microsystems; Multiprocessing; FIFO; Multicomputer Architecture
ID Code:38354
Deposited On:29 Apr 2011 08:05
Last Modified:29 Apr 2011 08:05

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