A Parallel Efficient Architecture for Large Cryptographically Robust n × k (k>n/2) Mappings

Mukhopadhyay, Debdeep ; Chowdhury, Dipanwita Roy (2011) A Parallel Efficient Architecture for Large Cryptographically Robust n × k (k>n/2) Mappings IEEE Transactions on Computers, 60 (3). pp. 375-385. ISSN 0018-9340

Full text not available from this repository.

Official URL: https://doi.org/10.1109/TC.2010.136

Related URL: http://dx.doi.org/10.1109/TC.2010.136

Abstract

We present a scalable, modular, memoryless, and reconfigurable parallel architecture to generate cryptographically robust mappings, which are useful in the construction of stream and block ciphers. It has been theoretically proved that the proposed architecture can be reconfigured to generate a large number of mappings, all of which have high nonlinearity, satisfies Strict Avalanche Criterion (SAC) and is robust against linear and differential cryptanalysis. The architecture can be also used to optimize the resiliency and algebraic degree. The architecture has been found to scale easily to handle large number of input variables, which is an important criterion in realizing nonlinear combiners for stream ciphers using Boolean functions.

Item Type:Article
Source:Copyright of this article belongs to IEEE.
Keywords:Boolean Functions; S-Box; Stream Cipher; Cryptographic Robustness; Scalable Architecture
ID Code:142819
Deposited On:25 Jun 2026 08:52
Last Modified:25 Jun 2026 08:52

Repository Staff Only: item control page