Introducing Recurrence in Strong PUFs for Enhanced Machine Learning Attack Resistance

Abstract

Hardware security circuits based on Physically Unclonable Functions (PUF) are finding widespread use due to increasing adoption of IoT devices. However, existing strong PUFs such as Arbiter-PUF (APUF) and its compositions are susceptible to machine learning (ML) attacks due to a linear relationship between the challenge and its response. In this paper, we present a Recurrence-based PUF (Rec-PUF) which uses feedback and XOR function together to significantly improve ML-attack resistance, without significant reduction in reliability. Our method is generic and works for both analog and digital PUF cores. As proof of the claim, we apply recurrence on an analog PUF using current mirror array validated on ASIC libraries, referred to as Rec-CMAPUF. At the other end, we also design and evaluate a digital PUF fortified with recurrence, called Rec-DAPUF, based on double arbiter logic and prototyped on FPGAs. Our result shows that ML resistance of Rec-CMAPUF is within 62% with 138, 000 CRPs, with reliability of 95%. Likewise, ML resistance of Rec-DAPUF is around 64%, with average reliability of 95.9%. The merit of recurrence wrt. ML attacks can be understood by the fact that without recurrence the CMAPUF/DAPUF can be modeled with 99%/80% accuracy, thus showing the efficacy and also applicability of the technique for various PUFs and platforms. In addition recurrence is suitably traded to ensure acceptable power consumption of 12.3 μW with energy/bit of ≈ 0.16 pJ for Rec-CMAPUF, estimated through SPICE simulations, while an 165.4 pJ/bit consumption for Rec-DAPUF, based on FPGA results.