Rebeiro, Chester ; Roy, Sujoy Sinha ; Reddy, D. Sankara ; Mukhopadhyay, Debdeep (2011) Revisiting the Itoh-Tsujii Inversion Algorithm for FPGA Platforms IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 19 (8). pp. 1508-1512. ISSN 1063-8210
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Official URL: https://doi.org/10.1109/TVLSI.2010.2051343
Related URL: http://dx.doi.org/10.1109/TVLSI.2010.2051343
Abstract
The Itoh-Tsujii multiplicative inverse algorithm (ITA) forms an integral component of several cryptographic implementations such as elliptic curve cryptography. For binary fields generated by irreducible trinomials, this paper proposes a modified ITA algorithm for efficient implementations on field-programmable gate-array (FPGA) platforms. Efficiency is obtained by the fact that the adapted ITA algorithm uses FPGA resources better and requires shorter addition chains. Evidence is furnished and supported with experimental results to show that the proposed architecture outperforms reported results. The proposed method is also shown to be scalable with respect to field sizes.
| Item Type: | Article |
|---|---|
| Source: | Copyright of this article belongs to IEEE. |
| Keywords: | Field-Programmable Gate-Array (Fpga)-Based Designs; Itoh-Tsujii Algorithm (Ita) |
| ID Code: | 142770 |
| Deposited On: | 23 Jun 2026 10:53 |
| Last Modified: | 23 Jun 2026 10:53 |
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