Dual top gated graphene transistor in the quantum Hall regime

Bhat, Ajay K. ; Singh, Vibhor ; Patil, Sunil ; Deshmukh, Mandar M. (2012) Dual top gated graphene transistor in the quantum Hall regime Solid State Communications, 152 (6). pp. 545-548. ISSN 0038-1098

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Official URL: http://doi.org/10.1016/j.ssc.2011.12.030

Related URL: http://dx.doi.org/10.1016/j.ssc.2011.12.030


We study the effect of local modulation of charge density and carrier type in graphene field effect transistors using a double top gate geometry. The two top gates lead to the formation of multiple p–n junctions. Electron transport measurements at low temperature and in the presence of magnetic field show various integer and fractionally quantized conductance plateaus. We explain these results based on the mixing of the edge channels and find that inhomogeneity plays an important role in defining the exact quantization of these plateaus, an issue critical for applications of p–n junctions.

Item Type:Article
Source:Copyright of this article belongs to Elsevier Science.
Keywords:A. Graphene; C. Field Effect Transistor; D. p–n Junctions; D. Quantum Hall Regime.
ID Code:117650
Deposited On:29 Apr 2021 05:28
Last Modified:29 Apr 2021 05:28

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