Mahapatra, S. ; Alam, M. A. (2002) A predictive reliability model for PMOS bias temperature degradation In: 2002 International Electron Devices Meeting, IEDM '02, 8-11 Dec, 2002, San Francisco, CA, USA.
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Official URL: http://ieeexplore.ieee.org/document/1175890/
Related URL: http://dx.doi.org/10.1109/IEDM.2002.1175890
Abstract
Bias temperature degradation is studied in p-MOSFETs. The physical mechanisms responsible for degradation over a wide range of stress bias and temperature have been identified. A novel scaling methodology is proposed that helps in obtaining a simple, analytical model useful for reliability projection.
| Item Type: | Conference or Workshop Item (Paper) |
|---|---|
| Source: | Copyright of this article belongs to Institute of Electrical and Electronics Engineers. |
| ID Code: | 112615 |
| Deposited On: | 12 Apr 2018 07:22 |
| Last Modified: | 12 Apr 2018 07:22 |
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