Chauhan, P. ; Dasgupta, P. ; Chakrabarti, P. P. (1999) Exploiting isomorphism for compaction and faster simulation of binary decision diagrams In: Twelfth International Conference on VLSI Design 1999, 7-10 January 1999.
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Official URL: http://ieeexplore.ieee.org/document/745173/
Related URL: http://dx.doi.org/10.1109/ICVD.1999.745173
Abstract
We present two techniques for compaction of ROBDDs. The first technique extracts isomorphic subtrees from a characteristic function ROBDD (cfBDD), replaces them by multi-output nodes, and stores the extracted subtrees as MTBDDs. The second technique searches pre-defined topological structures (signatures) within the cfBDD and replaces them by multi-output nodes. While both approaches are able to extract isomporphic subtrees in the cfBDD, the signature scanning approach gives a significantly better compression and reduces the simulation time as compared to cfBDD simulation, which shows that is possible to compress BDDs and yet simulate them faster.
| Item Type: | Conference or Workshop Item (Paper) |
|---|---|
| Source: | Copyright of this article belongs to Institute of Electrical and Electronics Engineers. |
| ID Code: | 101736 |
| Deposited On: | 09 Mar 2018 10:18 |
| Last Modified: | 09 Mar 2018 10:18 |
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