Auxiliary state machines and auxiliary functions: constructs for extending AMS assertions

Mukherjee, S ; Dasgupta, P (2011) Auxiliary state machines and auxiliary functions: constructs for extending AMS assertions In: 2011 24th Internatioal Conference on VLSI Design, 2-7 January 2011, Chennai, India.

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Official URL: http://ieeexplore.ieee.org/document/5718777/

Related URL: http://dx.doi.org/10.1109/VLSID.2011.27

Abstract

As research on developing assertion languages for the AMS domain gains in momentum, it is increasingly being felt that extensions of existing assertion languages like PSL and SVA into the AMS domain are not adequate for expressing the analog design intent. This is largely due to the intricacy of the analog behavioral intent which cannot be captured purely in terms of logic. In this paper we show that by using auxiliary forms of formal specifications such as abstract state machines and real valued functions as references for AMS assertions, it becomes possible to model complex AMS behavioral properties. This approach leverages the growing adoption of AMS behavioral modeling in the industry. The paper also shows that the use of auxiliary state machines allows us to separate out the scope of different analog assertions leading to significant performance gains in the assertion checking overhead.

Item Type:Conference or Workshop Item (Paper)
Source:Copyright of this article belongs to Institute of Electrical and Electronics Engineers.
Keywords:Integrated Circuit Modeling; Semantics; Hardware Design Languages; Industries; Mathematical Model; Context; Protocols
ID Code:101629
Deposited On:12 Dec 2016 10:36
Last Modified:12 Dec 2016 10:36

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