Assertion aware sampling refinement: a mixed-signal perspective

Mukherjee, Subhankar ; Dasgupta, Pallab (2012) Assertion aware sampling refinement: a mixed-signal perspective IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 31 (11). pp. 1772-1776. ISSN 0278-0070

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Official URL: http://ieeexplore.ieee.org/document/6331650/

Related URL: http://dx.doi.org/10.1109/TCAD.2012.2202394

Abstract

Sampling has been one of the key issues in simulation-based verification of analog and mixed signal (AMS) systems. Recent attempts toward extending assertion languages to the AMS domain has brought forward an obvious question. In what way should sampling be done to ensure that assertions are evaluated correctly? Increasing sampling granularity often comes with substantial simulation time overhead. On the other hand, interpolation of the analog signals between consecutive samples introduces inaccuracies in the signal values and, hence, in the truth of the assertions. This paper explores how temporal assertions are handled for inadequately sampled signals. We propose a three-valued semantics (true, false, and unknown) for AMS assertions to address the uncertainty caused by the inadequacy of samples. The evaluation algorithm reports the time intervals where additional samples are required to resolve the uncertainty, thereby paving the way for adaptive sampling refinement in assertion aware AMS simulation.

Item Type:Article
Source:Copyright of this article belongs to Institute of Electrical and Electronic Engineers.
Keywords:Simulation; Real-time Temporal Logic; Sampling
ID Code:101120
Deposited On:09 Mar 2018 10:16
Last Modified:09 Mar 2018 10:16

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