Sarkar, Arnab ; Chakrabarti, Partha P. ; Kumar, Rajeev (2006) Frame-based proportional round-robin IEEE Transactions on Computers, 55 (9). pp. 1121-1129. ISSN 0018-9340
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Official URL: http://www.computer.org/portal/web/csdl/doi/10.110...
Related URL: http://dx.doi.org/10.1109/TC.2006.148
Abstract
All known real-time proportional fair scheduling mechanisms either have high scheduling overheads (O(lg n) per time-slot) or do not efficiently handle dynamic task sets. This paper presents Frame-Based Proportional Round-Robin (FBPRR), a real-time fair scheduler providing high and bounded proportional fairness accuracy and O(1) scheduling overhead with the ability to efficiently handle a set of dynamic tasks. FBPRR achieves this by applying the benefits of Virtual-Time Round-Robin (VTRR) scheduling mechanism within a frame-based scheduling approach. Simulation results show that the algorithm gains a speedup of 5 to 20 times (over O(lg n) complexity schedulers) with fairly high fairness.
| Item Type: | Article |
|---|---|
| Source: | Copyright of this article belongs to Institute of Electrical and Electronic Engineers. |
| ID Code: | 5993 |
| Deposited On: | 19 Oct 2010 09:58 |
| Last Modified: | 20 May 2011 09:24 |
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