Items where Author is "Woo, J. C. S."Group by: Item Type | No Grouping Jump to: Article Number of items: 17. ArticleHakim, N. ; Rao, V. R. ; Vasi, J. ; Woo, J. C. S. (2005) Superior hot carrier reliability of single halo (SH) silicon-on-insulator (SOI) nMOSFET in analog applications IEEE Transactions on Device and Materials Reliability, 5 (1). pp. 127-132. ISSN 1530-4388 Borse, D. G. ; M. Rani, K. N. ; Jha, N. K. ; Chandorkar, A. N. ; Vasi, J. ; Ramgopal Rao, V. ; Cheng, B. ; Woo, J. C. S. (2002) Optimization and realization of sub-100-nm channel length single halo p-MOSFETs IEEE Transactions on Electron Devices, 49 (6). pp. 1077-1079. ISSN 0018-9383 Najeev-ud-din, ; Dunga, M. V. ; Kumar, A. ; Vasi, J. ; Ramgopal Rao, V. ; Cheng, Baohong ; Woo, J. C. S. (2002) Änalysis of floating body effects in thin film conventional and single pocket SOI MOSFETs using the GIDL current technique IEEE Electron Device Letters, 23 (4). pp. 209-211. ISSN 0741-3106 Jha, Neeraj K. ; Ramgopal Rao, V. ; Woo, J. C. S. (2002) Optimization of single halo p-MOSFET implant parameters for improved analog performance and reliability Proceedings of the 32nd European Solid-State Device Research Conference (ESSDERC), Florence, Italy . pp. 603-606. Mahapatra, S. ; Rao, V. R. ; Vasi, J. ; Cheng, B. ; Woo, J. C. S. (2001) A study of hot-carrier induced interface-trap profiles in lateral asymmetric channel MOSFETs using a novel charge pumping technique Solid-State Electronics, 45 (10). pp. 1717-1723. ISSN 0038-1101 Mahapatra, S. ; Rao, V. R. ; Cheng, B. ; Khare, M. ; Parikh, C. D. ; Woo, J. C. S. ; Vasi, J. M. (2001) Performance and hot-carrier reliability of 100 nm channel length jet vapor deposited Si3N4 MNSFETs IEEE Transactions on Electron Devices, 48 (4). pp. 679-684. ISSN 0018-9383 Mahapatra, S. ; Ramgopal Rao, V. ; Vasi, J. ; Cheng, B. ; Woo, J. C. S. (2000) Reliability studies on sub 100 nm SOI-MNSFETs Proceedings of the International Integrated Reliability Workshop, California, USA . pp. 29-31. Cheng, Baohong ; Rao, V. R. ; Woo, J. C. S. (1999) Exploration of velocity overshoot in a high-performance deep sub-0.1-µm SOI MOSFET with asymmetric channel profile IEEE Electron Device Letters, 20 (10). pp. 538- 540. ISSN 0741-3106 Inani, A. ; Rao, V. R. ; Cheng, B. ; Zeitzoff, P. ; Woo, J. C. S. (1999) Capacitance degradation due to fringing field in deep sub-micron MOSFETs with high-K gate dielectrics 29th European Solid-State Device Research Conference (ESSDERC), Leuven, Belgium . pp. 160-163. Mahapatra, S. ; Ramgopal Rao, V. ; Parikh, C. D. ; Vasi, J. ; Cheng, B. ; Khare, M. ; Woo, J. C. S. (1999) Hot-carrier induced interface degradation in jet vapor deposited SiN MNSFETs as studied by a novel charge pumping technique 29th European Solid-State Device Research Conference (ESSDERC), Leuven, Belgium . pp. 592-595. Mahapatra, S. ; Ramgopal Rao, V. ; Parikh, C. D. ; Vasi, J. ; Cheng, B. ; Woo, J. C. S. (1999) A study of 100 nm channel length asymmetric channel MOSFET by using charge pumping Microelectronic Engineering, 48 (1-4). pp. 193-196. ISSN 0167-9317 Cheng, B. ; Cao, M. ; Rao, R. ; Inani, A. ; Vande Voorde, P. ; Greene, W. M. ; Stork, J. M. C. ; Yu, Zhiping ; Zeizoff, P. M. ; Woo, J. C. S. (1999) The impact of high-κ gate dielectrics and metal gate electrodes on sub-100 nm MOSFETs IEEE Transactions on Electron Devices, 46 (7). pp. 1537-1544. ISSN 0018-9383 Mahapatra, S. ; Ramgopal Rao, V. ; Manjula Rani, K. N. ; Parikh, C. D. ; Vasi, J. ; Cheng, B. ; Khare, M. ; Woo, J. C. S. (1999) 100 nm channel length MNSFETs using a jet vapor deposited ultra-thin silicon nitride gate dielectric Technical Digest, 1999 Symposium on VLSI Technology, Kyoto, Japan . pp. 79-80. Cheng, Baohong ; Inani, A. ; Rao, R. ; Woo, J. C. S. (1999) Channel engineering for high speed sub-1.0 V power supply deep sub-micron CMOS Technical Digest, 1999 Symposium on VLSI Technology, Kyoto, Japan . pp. 69-70. Cheng, B. ; Rao, V. R. ; Woo, J. C. S. (1998) Sub-0.18 μm SOI MOSFETs using lateral asymmetric channel profile and Ge pre-amorphization salicide technology Proceedings of the IEEE SOI Conference, Stuart, Florida, USA . pp. 113-114. ISSN 1078-621X Cheng, B. ; Ramgopal Rao, V. ; Ikegami, B. ; Woo, J. C. S. (1998) Realization of 0.1 um asymmetric channel MOSFETs with excellent short-channel performance and reliability Technical Digest, 28th European Solid-State Device Research Conference (ESSDERC), Bordeaux, France . pp. 520-523. Inani, A. ; Ramgopal Rao, V. ; Cheng, B. ; Cao, M. ; Voorde, P. V. ; Greene, W. ; Woo, J. C. S. (1998) Performance considerations in using high-k dielectrics for deep sub-micron MOSFETs Proceedings of the Solid state Devices and Materials (SSDM) Research Conference, Hiroshima, Japan . pp. 94-95. |

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