Items where Author is "Vasi, J."

Article

Hariharan, V. ; Vasi, J. ; Rao, V. R. (2009) An improvement to the numerical robustness of the surface potential approximation for double-gate MOSFETs IEEE Transactions on Electron Devices, 56 (3). pp. 529-532. ISSN 0018-9383

Hariharan, V. ; Vasi, J. ; Rao, V. R. (2008) Drain current model including velocity saturation for symmetric double-gate MOSFETs IEEE Transactions on Electron Devices, 55 (8). pp. 2173-2180. ISSN 0018-9383

Hariharan, V. ; Thakker, R. ; Patil, M. B. ; Vasi, J. ; Rao, V. R. (2008) Closed form current and conductance model for symmetric double-gate MOSFETs using field-dependent mobility and body doping Technical Proceedings of the 2008 NSTI Nanotechnology Conference and Trade Show, NSTI-Nanotech, Nanotechnology, 3 . pp. 857-860.

Hakim, Najeeb-ud-din ; Ramgopal Rao, V. ; Vasi, J. (2005) Design of a 0.1 µm single halo (SH) thin film silicon-on-insulator (SOI) MOSFET for analogue applications Semiconductor Science and Technology, 20 (9). pp. 895-902. ISSN 0268-1242

Hakim, N. ; Rao, V. R. ; Vasi, J. ; Woo, J. C. S. (2005) Superior hot carrier reliability of single halo (SH) silicon-on-insulator (SOI) nMOSFET in analog applications IEEE Transactions on Device and Materials Reliability, 5 (1). pp. 127-132. ISSN 1530-4388

Din, N. ; Rao, V. R. ; Vasi, J. (2003) Thin film single halo (SH) SOI nMOSFETs-hot carrier reliability for mixed mode applications IEEE TENCON 2003, Convergent Technologies for the Asia-Pacific, Bangalore, India, 2 . pp. 613-617.

ManjulaRani, K. N. ; Ramgopal Rao, V. ; Vasi, J. (2003) Reliability of ultrathin JVD silicon nitride MNSFETs under high field stressing IEEE Transactions on Device and Materials Reliability . pp. 168-172.

ManjulaRani, K. N. ; Rao, V. R. ; Vasi, J. (2003) A new method to characterize border traps in sub-micron transistors using hysteresis in the drain current IEEE Transactions on Electron Devices, 50 (4). pp. 973- 979. ISSN 0018-9383

Hakim, N. ; Rao, V. R. ; Vasi, J. (2003) Small signal characteristics of thin film single halo SOI MOSFET for mixed mode applications Proceedings - IEEE International Conference on VLSI Design . pp. 110-115. ISSN 1063-9667

Borse, D. G. ; M. Rani, K. N. ; Jha, N. K. ; Chandorkar, A. N. ; Vasi, J. ; Ramgopal Rao, V. ; Cheng, B. ; Woo, J. C. S. (2002) Optimization and realization of sub-100-nm channel length single halo p-MOSFETs IEEE Transactions on Electron Devices, 49 (6). pp. 1077-1079. ISSN 0018-9383

Najeev-ud-din, ; Dunga, M. V. ; Kumar, A. ; Vasi, J. ; Ramgopal Rao, V. ; Cheng, Baohong ; Woo, J. C. S. (2002) Änalysis of floating body effects in thin film conventional and single pocket SOI MOSFETs using the GIDL current technique IEEE Electron Device Letters, 23 (4). pp. 209-211. ISSN 0741-3106

Najeeb-ud-Din, ; Ramgopal Rao, V. ; Vasi, J. (2002) Characterization and simulation of lateral asymmetric Channel silicon-on-insulator MOSFETs Proceedings of the 11th International Workshop on The Physics of Semiconductor Devices, Delhi, India, 4746 (2). pp. 644-648. ISSN 1017-2653

ManjulaRani, K. N. ; Ramgopal Rao, V. ; Vasi, J. (2002) Degradation study of ultra-thin JVD silicon nitride MNSFETs MRS Proceedings, 716 . pp. B4.18_1-B4.18_6. ISSN 1946-4274

ManjulaRani, K. N. ; Ramgopal Rao, V. ; Vasi, J. (2002) High field stressing effects in JVD Nitride capacitors Proceedings of the 11th International Workshop on the Physics of Semiconductor Devices, 4746 (2). pp. 1316-1319. ISSN 1017-2653

Najeeb-ud-Din, ; Mohan, Aatish K. ; Dunga, V. ; Ramgopal Rao, V. ; Vasi, J. (2002) Suppression of parasitic BJT action in single pocket thin film deep sub-micron SOI MOSFETs MRS Proceedings, 716 . pp. B1.1_1-B1.1_6. ISSN 1946-4274

Mahapatra, S. ; Rao, V. R. ; Vasi, J. ; Cheng, B. ; Woo, J. C. S. (2001) A study of hot-carrier induced interface-trap profiles in lateral asymmetric channel MOSFETs using a novel charge pumping technique Solid-State Electronics, 45 (10). pp. 1717-1723. ISSN 0038-1101

Najeeb-ud-Din, ; Dunga, M. V. ; Kumar, A. ; Ramgopal Rao, V. ; Vasi, J. (2001) Characterization of lateral asymmetric channel (LAC) thin film SOI MOSFETs 6th International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Shanghai, China, 1 . pp. 655-660.

Shrivastav, G. ; Mahapatra, S. ; Ramgopal Rao, V. ; Vasi, J. (2001) Performance optimization of 60 nm channel length vertical MOSFETs using channel engineering Proceedings of the 14th International Conference on VLSI Design, Bangalore, India . pp. 475-478.

Anil, K. G. ; Mahapatra, S. ; Eisele, I. ; Rao, V. R. ; Vasi, J. (2000) Drain bias dependence of gate oxide reliability in conventional and asymmetrical channel MOSFETs in the low voltage regime Proceedings of the 30th European Solid-State Device Research Conference (ESSDERC), Ireland . pp. 124-127.

Mahapatra, S. ; Parikh, C. D. ; Rao, V. R. ; Viswanathan, C. R. ; Vasi, J. (2000) Device scaling effects on hot-carrier induced interface and oxide-trapped charge distributions in MOSFETs IEEE Transactions on Electron Devices, 47 (4). pp. 789-796. ISSN 0018-9383

Mahapatra, S. ; Parikh, C. D. ; Ramagopal Rao, V. ; Viswanathan, C. R. ; Vasi, J. (2000) A comprehensive study of hot-carrier induced interface and oxide trap distributions in MOSFETs using a novel charge pumping technique IEEE Transactions on Electron Devices, 47 (1). pp. 171-177. ISSN 0018-9383

Mahapatra, S. ; Ramgopal Rao, V. ; Vasi, J. ; Cheng, B. ; Woo, J. C. S. (2000) Reliability studies on sub 100 nm SOI-MNSFETs Proceedings of the International Integrated Reliability Workshop, California, USA . pp. 29-31.

Mahapatra, S. ; Manjularani, K. N. ; Ramgopal Rao, V. ; Vasi, J. (2000) ULSI MOS transistors with jet vapour deposited (JVD) silicon nitride for the gate insulator SPIE Proceedings Series, 3975 (2). pp. 803-810. ISSN 1017-2653

Mahapatra, S. ; Ramgopal Rao, V. ; Parikh, C. D. ; Vasi, J. ; Cheng, B. ; Khare, M. ; Woo, J. C. S. (1999) Hot-carrier induced interface degradation in jet vapor deposited SiN MNSFETs as studied by a novel charge pumping technique 29th European Solid-State Device Research Conference (ESSDERC), Leuven, Belgium . pp. 592-595.

Ramgopal Rao, V. ; Hansch, W. ; Mahapatra, S. ; Sharma, D. K. ; Vasi, J. ; Grabolla, T. ; Eisele, I. (1999) Low temperature-high pressure grown thin gate dielectrics for MOS applications Microelectronic Engineering, 48 (1-4). pp. 223-226. ISSN 0167-9317

Mahapatra, S. ; Ramgopal Rao, V. ; Parikh, C. D. ; Vasi, J. ; Cheng, B. ; Woo, J. C. S. (1999) A study of 100 nm channel length asymmetric channel MOSFET by using charge pumping Microelectronic Engineering, 48 (1-4). pp. 193-196. ISSN 0167-9317

Mahapatra, S. ; Parikh, C. D. ; Vasi, J. ; Ramgopal Rao, V. ; Viswanathan, C. R. (1999) A direct charge pumping technique for spatial profiling of hot-carrier induced interface and oxide traps in MOSFETs Solid-State Electronics, 43 (5). pp. 915-922. ISSN 0038-1101

Mahapatra, S. ; Parikh, C. D. ; Vasi, J. (1999) A new "multifrequency" charge pumping technique to profile hot-carrier-induced interface-state density in nMOSFET's IEEE Transactions on Electron Devices, 46 (5). pp. 960-967. ISSN 0018-9383

Mahapatra, S. ; Ramgopal Rao, V. ; Manjula Rani, K. N. ; Parikh, C. D. ; Vasi, J. ; Cheng, B. ; Khare, M. ; Woo, J. C. S. (1999) 100 nm channel length MNSFETs using a jet vapor deposited ultra-thin silicon nitride gate dielectric Technical Digest, 1999 Symposium on VLSI Technology, Kyoto, Japan . pp. 79-80.

Ramgopal Rao, V. ; Hansch, W. ; Baumgartner, H. ; Eisele, I. ; Sharma, D. K. ; Vasi, J. ; Grabolla, T. (1997) Charge trapping behaviour in deposited and grown thin metal-oxide-semiconductor gate dielectrics Thin Solid Films, 296 (1-2). pp. 37-40. ISSN 0040-6090

Ramgopal Rao, V. ; Eisele, I. ; Patrikar, R. M. ; Sharma, D. K. ; Vasi, J. ; Grabolla, T. (1997) High-field stressing of LPCVD gate oxides IEEE Electron Device Letters, 18 (3). pp. 84-86. ISSN 0741-3106

Ramgopal Rao, V. ; Sharma, D. K. ; Vasi, J. (1996) Neutral electron trap generation under irradiation in reoxidized nitrided gate dielectrics IEEE Transactions on Electron Devices, 43 (9). pp. 1467-1470. ISSN 0018-9383

Ramgopal Rao, V. ; Vasi, J. (1992) Radiation-induced interface-state generation in reoxidized nitrided SiO₂ Journal of Applied Physics, 71 (2). pp. 1029_1-1029_3. ISSN 0021-8979

Conference or Workshop Item

Sandhya, C. ; Ganguly, U. ; Singh, K. K. ; Singh, P. K. ; Olsen, C. ; Seutter, S. M. ; Hung, R. ; Conti, G. ; Ahmed, K. ; Krishna, N. ; Vasi, J. ; Mahapatra, S. (2008) Nitride engineering and the effect of interfaces on Charge Trap Flash performance and reliability In: 2008 IEEE International Reliability Physics Symposium, IRPS 2008, 27 April-1 May, 2008, Phoenix, AZ, USA.

Sandhya, C. ; Ganguly, U. ; Singh, K. K. ; Olsen, C. ; Seutter, S. M. ; Conti, G. ; Ahmed, K. ; Krishna, N. ; Vasi, J. ; Mahapatra, S. (2008) The effect of band gap engineering of the nitride storage node on performance and reliability of charge trap flash In: 2008 15th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2008, 7-11 July, 2008, Singapore, Singapore.

Nainani, A. ; Palit, S. ; Singh, P. K. ; Ganguly, U. ; Krishna, N. ; Vasi, J. ; Mahapatra, S. (2007) Development of A 3D simulator for metal Nanocrystal (NC) flash memories under NAND operation In: 2007 IEEE International Electron Devices Meeting, IEDM 2007, 10-12 Dec, 2007, Washington, DC, USA.

Kumar, P. B. ; Sharma, R. ; Nair, P. R. ; Nair, D. R. ; Kamohara, S. ; Mahapatra, S. ; Vasi, J. (2005) Mechanism of drain disturb in SONOS flash EEPROMs In: 2005 43rd Annual IEEE International Reliability Physics Symposium. Proceedings, 17-21 April, 2005, San Jose, CA, USA.