Shrivastava, M. ; Baghini, M. S. ; Gossner, H. ; Rao, V. R. (2010) Part I. Mixed-signal performance of various high-voltage drain-extended MOS devices IEEE Transactions on Electron Devices, 57 (2). pp. 448-457. ISSN 0018-9383
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Official URL: http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arn...
Related URL: http://dx.doi.org/10.1109/TED.2009.2036796
Abstract
In this paper, the optimization issues of various drain-extended devices are discussed for input/output applications. The mixed-signal performance, impact of process variations, and gate oxide reliability of these devices are compared. Lightly doped drain MOS (LDDMOS) was found to have a moderate performance advantage as compared to shallow trench isolation (STI) and non-STI drain-extended MOS (DeMOS) devices. Non-STI DeMOS devices have improved circuit performance but suffer from the worst gate oxide reliability. Incorporating an STI region underneath the gate-drain overlap improves the gate oxide reliability, although it degrades the mixed-signal characteristics of the device. The single-halo nature of DeMOS devices has been shown to be effective in suppressing the short-channel effects.
Item Type: | Article |
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Source: | Copyright of this article belongs to IEEE. |
ID Code: | 80927 |
Deposited On: | 02 Feb 2012 14:28 |
Last Modified: | 02 Feb 2012 14:28 |
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