Novel high gain topologies for ac-dc conversion with power factor correction and dc link capacitor reduction

M P, Shreelakshmi ; Agarwal, Vivek (2016) Novel high gain topologies for ac-dc conversion with power factor correction and dc link capacitor reduction In: 2016 IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES), 14-17 Dec. 2016, Trivandrum.

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Official URL: http://doi.org/10.1109/PEDES.2016.7914316

Related URL: http://dx.doi.org/10.1109/PEDES.2016.7914316

Abstract

In this paper, power factor corrected novel ac-dc rectifier topologies for 1-ph and 3-ph application are proposed. These converters provide high gain and do input current shaping as well. A mutual inductor is used at the ac side for providing high gain as well as current shaping. The ripple energy of the system is analyzed. The relations between the ripple energy of 1-ph and 3-ph system with power factor, power rating and input inductance is derived in this paper. The use of auxiliary storage unit for buffering ripple energy is also attempted with a view to reduce the dc link capacitance, thereby increasing the reliability and dynamic response of the system. The proposed topologies are simulated in MATLAB/Simulink. Preliminary analysis of the proposed 1-ph and 3-ph topologies for gain calculation is also presented in this paper. Experiments for the conventional power factor correction in 1-ph and 3-ph systems were also conducted for comparison with proposed scheme. These results are presented in this paper.

Item Type:Conference or Workshop Item (Paper)
Source:Copyright of this article belongs to Institute of Electrical and Electronics Engineers.
Keywords:Power Factor Correction; AC-DC Conversion; Single Phase; Three Phase; DC Link Capacitor Reduction and Ultra-Capacitor.
ID Code:115565
Deposited On:24 Mar 2021 10:26
Last Modified:24 Mar 2021 10:26

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